1. Field of the Invention
The present invention relates to weighted capacitor circuit for use in digital-to-analog and analog-to-digital converters, and more particularly to a circuit employing two similar stages of weighted capacitors interconnected through a coupling capacitor and in combination with a feedback amplifier.
2. Description of the Prior Art
U.S. Pat. No. 3,890,610 issued June 17, 1975 to Olivier Cahen on a priority application filed Oct. 31, 1972 entitled "High Precision Digital-To-Analog Converters" and assigned to Thomson-CSF relates to a digital-to-analog converter including resistors arranged in a series of ladder networks which correspond to binary digits in combination with feedback amplifier which functions as a low impedance.
U.S. Pat. No. 3,611,356 issued Sept. 17, 1974 to Alan K. Jensen on an application filed Sept. 12, 1969 entitled "Digital-to-Analog Translator" and assigned to Litton Business Systems, Inc. and U.S. Pat. No. 3,836,906 issued Sept. 17, 1974 to Ando et al. on a priority application filed Feb. 28, 1973 entitled "Digital-To-Analog Converter Circuit" and assigned to Sony Corporation are example of converter circuits employing weighted capacitors.
Other references which illustrate the state of the prior art are as follows:
U.s. pat. No. 3,651,518 PA2 U.s. pat. No. 3,665,458 PA2 U.s. pat. No. 3,906,488
None of the cited references disclose a two-stage weighted capacitor converter according to the principles of the present invention.